1. Field of the Invention
This invention relates to a semiconductor device with a high voltage breakdown characteristic, which includes a field limiting ring and a passivation layer.
2. Reference to the Prior Art
As is well known, in a planar transistor, diode, or other semiconductor device, an edge of a junction at the major surface has a certain pronounced curvature, because the PN junction is formed by the selective diffusion method through a window which is opened in the diffusion mask.
The planar device has another characteristic, that is, the end of the PN junction of the device extending to the major surface is covered by a silicon-dioxide (SiO.sub.2) layer which has previously been used as the diffusion mask.
When a reverse bias is applied across the PN junction, the voltage of this bias is supported by the depletion region which appears adjacent to the PN junction. When the reverse bias is very high, surface breakdown occurs at the top surface of the device, because the effective width of the depletion layer at the surface becomes smaller than that of the bulk portion.
Such a device having an additional semiconductor ring called a field limiting ring, has been proposed in order to avoid this disadvantage. See for example, U.S. Pat. No. 3,555,373.
In this U.S. patent, the additional semiconductor ring makes a PN junction in the semiconductor body which surrounds the main PN junction of the planar-type diode.
By using this structure, the breakdown voltage characteristic of the device was greatly improved, and this device has obtained a certain degree of commercial success.
The present invention is the improvement of this device.